MSC SM2S-ZUSP
The MSC SM2S-ZUSP module is based on Xilinx Zynq UltraScale+ MPSoC and supports ZU2, ZU3, ZU4 or ZU5 FPGA complexity.
Zynq UltraScale+ MPSoC devices provide 64-bit processor scalability while combining real-time control with soft and hard engines for graphics, video, waveform, and packet processing. Integrating an ARM®-based system for advanced analytics and on-chip programmable logic for task acceleration creates unlimited possibilities for applications including 5G Wireless, next generation ADAS, Internet-of-Things, Industrial Automation, Medical, Transportation and Robotics.
MSC SM2S-ZUSP offers dual-core or quad-core ARM Cortex™-A53 processors in combination with dual ARM Cortex-R5 real time processors and ARM Mali™-400 GPU. It provides DDR4 SDRAM with optional ECC, dedicated DDR4 SDRAM for the Programmable Logic, up to 64GB eMMC Flash memory, Dual Gigabit Ethernet, PCI Express, USB 3.0, an on-board Wireless Module as well as an extensive set of interfaces for embedded applications.
The module is compliant with the new SMARC™ 2.0 standard, allowing easy integration with SMARC baseboards. For evaluation and design-in of the SM2S-ZUSP module, MSC provides a development platform and a starter kit. Support for Linux is available (Android support on request).
Highlights
- Dual or Quad core ARM Cortex-A53 Application Processors up to 1.5GHz
- Dual core ARM Cortex-R5 Real-Time Processors up to 600MHz
- Mali-400 MP2 Graphics Processor (optional)
- H.264 / H.265 Video Codec (optional)
- Up to 8GB DDR4 SDRAM, ECC support (optional)
- Up to 2GB DDR4 SDRAM for FPGA (optional)
- Up to 64GB eMMC Flash
- SATA-III interface (6Gbps)
- DisplayPort interface
- Dual-channel LVDS interface (optional)
- MIPI CSI-2 Camera Interface (optional)
- Up to 2x PCI Express x2 Gen. 3
- Up to 1x USB 3.0/2.0 Host interface
- Up to 3x USB 2.0 Host interface
- 1x USB 2.0 Host/Device interface
- Gigabit Ethernet (single or dual)
- Wireless Module (optional)
- 1x MMC/SD/SDIO interface
- 2x CAN interface
- UART, SPI, I2C
- Rich FPGA I/O
- SMARC 2.0 Compliant
Specifications
| Technology: | ARM |
| Form Factor: | SMARC Short Size |
| CPU: | Xilinx UltraScale+ ZU2CG, ZU3CG, ZU4CG or ZU5CG MPSoC with - Dual core ARM Cortex-A53 MPCore Application Processor up to 1.3GHz - Dual core ARM Cortex-R5 MPCore Real-Time Processor up to 533MHz Xilinx UltraScale+ ZU2EG, ZU3EG, ZU4EG, ZU5EG, ZU4EV or |
| Chipset: | SOC |
| RAM: | Up to 8GB DDR4-2400 SDRAM, soldered, ECC support (optional) Up to 2GB DDR4-2133 SDRAM, soldered, for Programmable Logic (optional) |
| Flash: | Up to 64GB eMMC Flash QSPI NOR Boot Flash |
| Storage Interfaces: | 1x MMC/SD/SDIO 1x SATA-III (6Gbps) |
| USB: | 1x USB 3.0/2.0 Host, 3x USB 2.0 Host, 1x USB 2.0 Host/Client or 1x USB 3.0/2.0 Host, 2x USB 2.0 Host, 1x USB 2.0 Host/Client (option w/ WLAN) or 1x USB 3.0 Host, 1x USB 2.0 Host, 1x USB 2.0 Host/Client (option w/o Hub) |
| Serial Interfaces: | 1x UART with 2-wire hand shake 1x UART w/o hand shake |
| Bus Interfaces: | 1x PCI Express x1 Gen. 2 (5Gbps) using ZU2/3 devices 2x PCI Express x2 Gen. 3 (8Gbps) using ZU4/5 devices 2x CAN 2.0B 2x SPI (with two chip selects) 3x I2C up to 400 Kbit/s |
| Display Controller: | ARM Mali-400 MP2 Graphics Processing Unit (EG/EV only) Multicore 2D/3D graphic acceleration at 667MHz OpenGL ES 1.1 / 2.0 and OpenVG 1.0 / 1.1 support Video Codec Unit (EV only) Supports H.265 (HEVC) / H.264 (AVC) standards Simultaneous encode and de |
| Display Interfaces: | Dual-channel 18/24 bit LVDS interface (optional, dependent on implementation in Programmable Logic) DisplayPort 1.2a (4096x2160 @ 30Hz) - support 1 lane using ZU2/3 devices - support 2 lanes using ZU2/3 devices (optional, variant w/o PCI Express) - s |
| Network Interface: | Up to 2x 10/100/1000BASE-T Ethernet (optional) HD Wireless Module SPB228, MU-MIMO 2x2 with 802.11 ac/a/b/g/n and Bluetooth/BLE support, soldered (optional) |
| Audio Interface: | optional, dependent on implementation in Programmable Logic |
| Security Device: | Advanced Security, Safety, and Reliability integrated in the MPSoC |
| Miscellaneous: | Watchdog Timer for system reset (programmable, 1s … 600s) 12x GPIO, configurable as input or output 60x FPGA I/O for customer use (optional, dependent on implementation in Programmable Logic) 2kbit ID EEPROM on I2C bus MIPI CSI-2 Camera Interface ( |
| Feature Highlights: | SMARC 2.0 compliant |
| OS Support: | Linux Board Support Package Android Board Support Package (on request) |
| Power Requirement: | Power Supply +5V +/-5%, 5V Standby Power Consumption TBD typ. (depending on MPSoC and PL) |
| Environment: | Temperature Range: 0°C … +85°C operating extended -40°C … +85°C operating industrial -40°C … +85°C storage Humidity: 5 … 95% (operating, non condensing) 5 … 95% (storage, non-condensing) |
| Dimensions: | 82 x 50 mm |
| Certificates: | UL / CE |
| Cooling: | Heatspreader Heatsink |
| Carrier: | MSC SM2-MB-EP1 MSC SM2-MB-EPZed (included in the Starterkit) |